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Roger Luis Uy
Roger Luis Uy
Assistant Professor of Computer Science, De La Salle University
Verified email at delasalle.ph
Title
Cited by
Cited by
Year
Serial and parallel implementation of Needleman-Wunsch algorithm.
YS Lee, YS Kim, RL Uy
International Journal of Advances in Intelligent Informatics 6 (1), 2020
142020
QCKer-FPGA: An FPGA implementation of Q-gram counting filter for DNA sequence alignment
JCG Maghirang, RL Uy, KVA Borja, JL Pernez
2019 IEEE 11th International Conference on Humanoid, Nanotechnology …, 2019
52019
DARC2: 2nd generation DLX architecture simulator
RL Uy, M Bernardo, J Erica
Proceedings of the 2004 workshop on Computer architecture education: held in …, 2004
52004
MIPSers: MIPS Extension Release 6 Simulator
RL Uy, NM Kho
2017 IEEE 9th International Conference on Humanoid, Nanotechnology …, 2017
4*2017
Fast 1-itemset frequency count using CUDA
RL Uy, N Marcos
2016 IEEE Region 10 Conference (TENCON), 210-213, 2016
32016
Survey on the Current Status of Serial and Parallel Algorithms of Frequent Itemset Mining
RL Uy, MTC Suarez
Manila Journal of Science 9, 115-135, 2016
22016
MIPS64 simulator on a mobile environment
RL Uy, MA Capuz, L Policarpio, BJ Quinto, SE Reyes
2016 IEEE Region 10 Symposium, 219-224, 2016
2*2016
A static transliteration approach for assembly language translation
RL Uy, JP Cempron, C Salinas, JB Gonzales, Y Hayakawa
2016 IEEE Region 10 Symposium, 332-336, 2016
2*2016
Beyond multi-core: A survey of architectural innovations on microprocessor
RL Uy
2014 International Conference on Humanoid, Nanotechnology, Information …, 2014
22014
DARC: DLX Architecture Simulator
RL Uy, J Lee, JR Roque
Proceedings of the 4th Philippine Computing Science Congress, 2004
22004
Multiprocessing Implementation for Building a DNA q-gram Index Hash Table
CC Mercado, AR Fajardo, SK Manalili, R Zapanta, RL Uy
Computational Science and Technology: 7th ICCST 2020, Pattaya, Thailand, 29 …, 2021
12021
QCKer: An x86-AVX/AVX2 Implementation of Q-gram Counting Filter for DNA Sequence Alignment
JL Pernez Jr, RL Uy, KVA Borja, JCG Maghirang
Proceedings of the 6th International Conference on Bioinformatics Research …, 2019
12019
Implementation of hyyrö’s bit-vector algorithm using advanced vector extensions 2
KMC Chua, JAF Villamayor, LC Bautista, RL Uy
International Journal of Advances in Intelligent Informatics 5 (3), 230-242, 2019
12019
Assembly Program Performance Analysis Metrics: Instructions Performed and Program Latency Exemplified on Loop Unroll.
JP Cempron, CS Salinas, RL Uy
Philippine Journal of Science 147 (3), 2018
12018
CALVIS32: Customizable assembly language visualizer and simulator for intel x86-32 architecture
JG Alcalde, G Chua, IM Demabildo, MA Ong, RL Uy
2016 IEEE Region 10 Conference (TENCON), 214-217, 2016
12016
Determining the Correlation Between Concentration Levels and the Visual Features of Algae in Water Surfaces
ASK Ngo, JDB Desingco, MO Cordel II, RL Uy, PMB Ong, ER Punzalan, ...
12015
Complementary Preparation for Frame Alignment Algorithms Using PYNQ-Z2 FPGA
AE Wong, CL Ting, SV Lim, SE Lim, RL Uy, R Alfred, Z Iswandono
International Conference on Computational Science and Technology, 317-326, 2022
2022
SIMD Implementation of Modified Zhang’s Three-Frame Alignment Algorithm
SV Lim, SE Lim, CL Ting, AE Wong, RL Uy
2021 IEEE 13th International Conference on Humanoid, Nanotechnology …, 2021
2021
Multiprocess Implementation of DNA Pre-alignment Filtering using the Bit Matrix Algorithm
AR Fajardo, SK Manalili, CC Mercado, R Zapanta, RL Uy
2020 IEEE 12th International Conference on Humanoid, Nanotechnology …, 2020
2020
Static profiling of assembly code performance and optimization effectiveness using instructions performed and program latency
JPC Cempron, CSY Salinas, RL Uy
International Journal of Recent Technology and Engineering 8 (2 Special …, 2019
2019
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