Follow
Juan P. Oliver
Title
Cited by
Cited by
Year
Lab at home: Hardware kits for a digital design lab
JP Oliver, F Haim
IEEE Transactions on education 52 (1), 46-51, 2008
832008
Clock gating and clock enable for FPGA power reduction
JP Oliver, J Curto, D Bouvier, M Ramos, E Boemo
2012 VIII Southern Conference on Programmable Logic, 1-5, 2012
572012
Wireless EEG system achieving high throughput and reduced energy consumption through lossless and near-lossless compression
GD y Alvarez, F Favaro, F Lecumberry, A Martin, JP Oliver, J Oreggioni, ...
IEEE transactions on biomedical circuits and systems 12 (1), 231-241, 2018
272018
Power estimations vs. power measurements in Cyclone III devices
JP Oliver, E Boemo
2011 VII southern conference on Programmable Logic (SPL), 87-90, 2011
222011
Power estimations vs. power measurements in Spartan-6 devices
JP Oliver, JP Acle, E Boemo
2014 IX southern conference on Programmable Logic (SPL), 1-5, 2014
182014
Tracking the pipelining-power rule along the FPGA technical literature
E Boemo, JP Oliver, G Caffarena
Proceedings of the 10th FPGAworld Conference, 1-5, 2013
172013
Hardware lab at home possible with ultra low cost boards [logic design course]
JP Oliver, F Haim, S Fernandez, J Rodríguez, P Rolando
2005 IEEE International Conference on Microelectronic Systems Education (MSE …, 2005
172005
Wearable EEG via lossless compression
G Dufort, F Favaro, F Lecumberry, Á Martín, JP Oliver, J Oreggioni, ...
2016 38th annual international conference of the IEEE engineering in …, 2016
162016
Self-reconfigurable constant multiplier for fpga
J Hormigo, G Caffarena, JP Oliver, E Boemo
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 6 (3), 1-17, 2013
82013
SIMENERG: The Design of Autonomous Systems
C Briozzo, G Casaravilla, R Chaer, JP Oliver
UR. FING, 1996
71996
Understanding the performance of elementary NLA kernels in fpgas
F Favaro, JP Oliver, E Dufrechou, P Ezzatti
2020 IEEE International Parallel and Distributed Processing Symposium …, 2020
62020
Exploring fpga Optimizations to Compute Sparse Numerical Linear Algebra Kernels
F Favaro, E Dufrechou, P Ezzatti, JP Oliver
Applied Reconfigurable Computing. Architectures, Tools, and Applications …, 2020
62020
Diseño digital utilizando lógica programable: aplicaciones a la enseñanza
JP Oliver
52007
Hardware implementation of a multi-channel EEG lossless compression algorithm
F Favaro, JP Oliver
2019 X Southern Conference on Programmable Logic (SPL), 69-73, 2019
32019
A 64-channel wireless EEG recording system for wearable applications
M Causa, F La Paz, S Radi, JP Oliver, L Steinfeld, J Oreggioni
2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2018
32018
A low cost system for self measurements of power consumption in field programmable gate arrays
JP Oliver, F Veirano, D Bouvier, E Boemo
Journal of Low Power Electronics 13 (1), 1-9, 2017
32017
Técnicas de bajo consumo en FPGAs
JP Oliver
32014
Laboratory at home: Actual circuit design and testing experiences in massive digital design courses
F Haim, S Fernández, J Rodríguez, L Ciganda, P Rolando, JP Oliver
32006
Implementation of Adaptive Logic Networks on an FPGA board
JP Oliver, AF de Oliveira, JP Acle, RJ de la Vega, RM Canetti
Configurable computing: technology and applications 3526, 264-273, 1998
31998
Tools for design and evaluation of photovoltaic systems, III Congreso Internacional Energía
G Casaravilla, R Chaer, J Oliver
Ambiente e Innovación Tecnológica, Caracas, Venezuela, 1995
31995
The system can't perform the operation now. Try again later.
Articles 1–20