Minerva: Enabling low-power, highly-accurate deep neural network accelerators B Reagen, P Whatmough, R Adolf, S Rama, H Lee, SK Lee, ... ACM SIGARCH Computer Architecture News 44 (3), 267-278, 2016 | 768 | 2016 |
Ares: A framework for quantifying the resilience of deep neural networks B Reagen, U Gupta, L Pentecost, P Whatmough, SK Lee, N Mulholland, ... Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 362 | 2018 |
14.3 A 28nm SoC with a 1.2 GHz 568nJ/prediction sparse deep-neural-network engine with> 0.1 timing error rate tolerance for IoT applications PN Whatmough, SK Lee, H Lee, S Rama, D Brooks, GY Wei 2017 IEEE International Solid-State Circuits Conference (ISSCC), 242-243, 2017 | 209 | 2017 |
DNN engine: A 28-nm timing-error tolerant sparse deep neural network processor for IoT applications PN Whatmough, SK Lee, D Brooks, GY Wei IEEE Journal of Solid-State Circuits 53 (9), 2722-2731, 2018 | 106 | 2018 |
RaPiD: AI accelerator for ultra-low precision training and inference S Venkataramani, V Srinivasan, W Wang, S Sen, J Zhang, A Agrawal, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 88 | 2021 |
9.1 A 7nm 4-core AI chip with 25.6 TFLOPS hybrid FP8 training, 102.4 TOPS INT4 inference and workload-aware throttling A Agrawal, SK Lee, J Silberman, M Ziegler, M Kang, S Venkataramani, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 144-146, 2021 | 85 | 2021 |
A fully integrated reconfigurable switched-capacitor DC-DC converter with four stacked output channels for voltage stacking applications T Tong, SK Lee, X Zhang, D Brooks, GY Wei IEEE Journal of Solid-State Circuits 51 (9), 2142-2152, 2016 | 48 | 2016 |
Characterizing and evaluating voltage noise in multi-core near-threshold processors X Zhang, T Tong, S Kanev, SK Lee, GY Wei, D Brooks International Symposium on Low Power Electronics and Design (ISLPED), 82-87, 2013 | 48 | 2013 |
A 3.0 TFLOPS 0.62 V scalable processor core for high compute utilization AI training and inference J Oh, SK Lee, M Kang, M Ziegler, J Silberman, A Agrawal, ... 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 44 | 2020 |
A 16-core voltage-stacked system with an integrated switched-capacitor DC-DC converter SK Lee, T Tong, X Zhang, D Brooks, GY Wei 2015 Symposium on VLSI Circuits (VLSI Circuits), C318-C319, 2015 | 43 | 2015 |
A 16nm 25mm2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators PN Whatmough, SK Lee, M Donato, HC Hsueh, S Xi, U Gupta, ... 2019 Symposium on VLSI Circuits, C34-C35, 2019 | 40 | 2019 |
Evaluation of voltage stacking for near-threshold multicore computing SK Lee, D Brooks, GY Wei Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012 | 35 | 2012 |
A 16-nm always-on DNN processor with adaptive clocking and multi-cycle banked SRAMs SK Lee, PN Whatmough, D Brooks, GY Wei IEEE Journal of Solid-State Circuits 54 (7), 1982-1992, 2019 | 27 | 2019 |
A fully integrated battery-powered system-on-chip in 40-nm CMOS for closed-loop control of insect-scale pico-aerial vehicle X Zhang, M Lok, T Tong, SK Lee, B Reagen, S Chaput, PEJ Duhamel, ... IEEE Journal of Solid-State Circuits 52 (9), 2374-2387, 2017 | 27 | 2017 |
A 16-core voltage-stacked system with adaptive clocking and an integrated switched-capacitor dc–dc converter SK Lee, T Tong, X Zhang, D Brooks, GY Wei IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (4 …, 2016 | 26 | 2016 |
A 7-nm four-core mixed-precision AI chip with 26.2-TFLOPS hybrid-FP8 training, 104.9-TOPS INT4 inference, and workload-aware throttling SK Lee, A Agrawal, J Silberman, M Ziegler, M Kang, S Venkataramani, ... IEEE Journal of Solid-State Circuits 57 (1), 182-197, 2021 | 23 | 2021 |
CHIPKIT: An agile, reusable open-source framework for rapid test chip development PN Whatmough, M Donato, GG Ko, SK Lee, D Brooks, GY Wei IEEE Micro 40 (4), 32-40, 2020 | 21 | 2020 |
Smiv: A 16-nm 25-mm˛ soc for iot with arm cortex-a53, efpga, and coherent accelerators SK Lee, PN Whatmough, M Donato, GG Ko, D Brooks, GY Wei IEEE Journal of Solid-State Circuits 57 (2), 639-650, 2021 | 19 | 2021 |
A multi-chip system optimized for insect-scale flapping-wing robots X Zhang, M Lok, T Tong, S Chaput, SK Lee, B Reagen, H Lee, D Brooks, ... 2015 Symposium on VLSI Circuits (VLSI Circuits), C152-C153, 2015 | 18 | 2015 |
Fully-CMOS multi-level embedded non-volatile memory devices with reliable long-term retention for efficient storage of neural network weights S Ma, M Donato, SK Lee, D Brooks, GY Wei IEEE Electron Device Letters 40 (9), 1403-1406, 2019 | 13 | 2019 |