Parthasarathy Ranganathan
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The datacenter as a computer: An introduction to the design of warehouse-scale machines
LA Barroso, J Clidaras
Springer Nature, 2022
Single-ISA heterogeneous multi-core architectures: The potential for processor power reduction
R Kumar, KI Farkas, NP Jouppi, P Ranganathan, DM Tullsen
Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003
Making Scheduling" Cool": Temperature-Aware Workload Placement in Data Centers.
JD Moore, JS Chase, P Ranganathan, RK Sharma
USENIX annual technical conference, General Track, 61-75, 2005
Single-ISA heterogeneous multi-core architectures for multithreaded workload performance
R Kumar, DM Tullsen, P Ranganathan, NP Jouppi, KI Farkas
ACM SIGARCH Computer Architecture News 32 (2), 64, 2004
No" power" struggles: coordinated multi-level power management for the data center
R Raghavendra, P Ranganathan, V Talwar, Z Wang, X Zhu
Proceedings of the 13th international conference on Architectural support …, 2008
Heracles: Improving resource efficiency at scale
D Lo, L Cheng, R Govindaraju, P Ranganathan, C Kozyrakis
Proceedings of the 42nd Annual International Symposium on Computer …, 2015
Disaggregated memory for expansion and sharing in blade servers
K Lim, J Chang, T Mudge, P Ranganathan, SK Reinhardt, TF Wenisch
ACM SIGARCH computer architecture news 37 (3), 267-278, 2009
Profiling a warehouse-scale computer
S Kanev, JP Darago, K Hazelwood, P Ranganathan, T Moseley, GY Wei, ...
Proceedings of the 42nd Annual International Symposium on Computer …, 2015
Consistent and durable data structures for {Non-Volatile}{Byte-Addressable} memory
S Venkataraman, N Tolia, P Ranganathan, RH Campbell
9th USENIX Conference on File and Storage Technologies (FAST 11), 2011
Full-system power analysis and modeling for server environments
D Economou, S Rivoire, C Kozyrakis, P Ranganathan
Ensemble-level power management for dense blade servers
P Ranganathan, P Leech, D Irwin, J Chase
ACM SIGARCH computer architecture news 34 (2), 66-77, 2006
A power benchmarking framework for network devices
P Mahadevan, P Sharma, S Banerjee, P Ranganathan
NETWORKING 2009: 8th International IFIP-TC 6 Networking Conference, Aachen …, 2009
Heterogeneous chip multiprocessors
R Kumar, DM Tullsen, NP Jouppi, P Ranganathan
Computer 38 (11), 32-38, 2005
Dynamically selecting processor cores for overall power efficiency
K Farkas, NP Jouppi, RN Mayo, P Ranganathan
US Patent 7,093,147, 2006
A comparison of high-level full-system power models.
S Rivoire, P Ranganathan, C Kozyrakis
HotPower 8 (2), 32-39, 2008
Storing cache metadata separately from integrated circuit containing cache controller
J Chang, JJ Meza, P Ranganathan
US Patent 10,474,584, 2019
Reconfigurable caches and their application to media processing
P Ranganathan, S Adve, NP Jouppi
ACM SIGARCH Computer Architecture News 28 (2), 214-224, 2000
Google workloads for consumer devices: Mitigating data movement bottlenecks
A Boroumand, S Ghose, Y Kim, R Ausavarungnirun, E Shiu, R Thakur, ...
Proceedings of the Twenty-Third International Conference on Architectural …, 2018
JouleSort: a balanced energy-efficiency benchmark
S Rivoire, MA Shah, P Ranganathan, C Kozyrakis
Proceedings of the 2007 ACM SIGMOD international conference on Management of …, 2007
GViM: GPU-accelerated virtual machines
V Gupta, A Gavrilovska, K Schwan, H Kharche, N Tolia, V Talwar, ...
Proceedings of the 3rd ACM Workshop on System-level virtualization for High …, 2009
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