| SMAUG: End-to-End Full-Stack Simulation Infrastructure for Deep Learning Workloads S Likun Xi, Y Yao, K Bhardwaj, P Whatmough, GY Wei, D Brooks arXiv e-prints, arXiv: 1912.04481, 2019 | 58* | 2019 |
| SelectDirectory: a selective directory for cache coherence in many-core architectures Y Yao, G Wang, Z Ge, T Mitra, W Chen, N Zhang Proceedings of the 2015 Design, Automation & Test in Europe (DATE), 175-180, 2015 | 21 | 2015 |
| Determining optimal coherency interface for many-accelerator socs using bayesian optimization K Bhardwaj, M Havasi, Y Yao, DM Brooks, JMH Lobato, GY Wei IEEE Computer Architecture Letters 18 (2), 119-123, 2019 | 13 | 2019 |
| Efficient Timestamp-Based Cache Coherence Protocol for Many-Core Architectures Y Yao, G Wang, Z Ge, T Mitra, W Chen, N Zhang Proceedings of the 2016 International Conference on Supercomputing (ICS), 19, 2016 | 12 | 2016 |
| FPGA based hardware-software co-designed dynamic binary translation system Y Yao, Z Lu, Q Shi, W Chen 2013 23rd International Conference on Field programmable Logic and …, 2013 | 11 | 2013 |
| Early dse and automatic generation of coarse-grained merged accelerators I Brumar, G Zacharopoulos, Y Yao, S Rama, D Brooks, GY Wei ACM Transactions on Embedded Computing Systems 22 (2), 1-29, 2023 | 10 | 2023 |
| A comprehensive methodology to determine optimal coherence interfaces for many-accelerator SoCs K Bhardwaj, M Havasi, Y Yao, DM Brooks, JM Hernández-Lobato, GY Wei Proceedings of the ACM/IEEE International Symposium on Low Power Electronics …, 2020 | 10 | 2020 |
| Fusible and reconfigurable cache architecture M Pricopi, Z Ge, Y Yao, T Mitra, N Zhang US Patent 9,460,012, 2016 | 7 | 2016 |
| TC-Release++: An Efficient Timestamp-Based Coherence Protocol for Many-Core Architectures Y Yao, W Chen, T Mitra, Y Xiang IEEE Transactions on Parallel and Distributed Systems (TPDS), 2017 | 5 | 2017 |
| Cache coherence directory architecture with decoupled tag array and data array Y Yao, T Mitra, Z Ge, N Zhang US Patent 10,503,642, 2019 | | 2019 |
| Evaluating the Energy Efficiency of Hybrid Cache Coherence Protocol for Multi-Cores D Guo, Z Lu, Y Yao, W Chen National Annual Conference on High Performance Computing (HPC China), 785-788, 2014 | | 2014 |
Gu-Yeon WeiRobert and Suzanne Case Professor of EE and CS, Harvard UniversityVerified email at eecs.harvard.edu
